chipvault 200607 cad =1

A project organizer for VHDL and Verilog RTL hardware designs

There is no maintainer for this port.
Any concerns regarding this port should be directed to the FreeBSD Ports mailing list via ports@FreeBSD.org
Port Added: 29 Jan 2003 03:46:10

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ChipVault is a VHDL and Verilog Chip Design Organization tool which improves
design efficiency by:
   - Providing the ability to Navigate and Edit files Hierarchically.
   - Automatically generating Schematic Component Port views of VHDL and
     Verilog RTL files.
   - Automating RTL instantiation and template generation.
   - Providing Revision Control (designed for HW, not SW development).
   - Supporting External Tool Hooks (bottom-up vcoms,etc).
   - Providing an Issue Tracking Log with sorting.
   - Providing Netlist sorting and hierarchy viewing.
   - Supporting web-sharing of RTL files (both encrypted and clear).
   - Fast and Nimble.

WWW: http://chipvault.sourceforge.net/

CVSWeb : Sources : Main Web Site : Distfiles Availability : PortsMon

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Required To Run: lang/perl5.8

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To install the port: cd /usr/ports/cad/chipvault/ && make install clean
To add the package: pkg_add -r chipvault

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Configuration Options

     No options to configure

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Master Sites:

http://chipvault.sourceforge.net/

ftp://ftp.FreeBSD.org/pub/FreeBSD/ports/distfiles/

Update to 200607

PR:             100593
Submitted by:   Soeren Straarup <xride@x12.dk>

- Add SHA256

Use PLIST_FILES.

Reviewed by:    marcus

Add SIZE.

De-pkg-comment.

add chipvault 200211
A project organizer for VHDL and Verilog RTL hardware designs

9 vulnerabilities affecting 12 ports have been reported in the past 14 days

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