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Port details
riscv-fesvr RISC-V Frontend Server
g_20170711 emulators on this many watch lists=0 search for ports that depend on this port Find issues related to this port Report an issue related to this port
Maintainer: lwhsu@FreeBSD.org search for ports maintained by this maintainer
Port Added: 07 Feb 2017 15:33:13
License: BSD3CLAUSE
RISC-V Frontend Server

The RISC-V front-end server library, which facilitates communication between a
host machine and a RISC-V target machine. It is usually not meant to be used as
a standalone package.

WWW: https://github.com/freebsd-riscv/riscv-fesvr
SVNWeb : Homepage : PortsMon : pkg-plist

To install the port: cd /usr/ports/emulators/riscv-fesvr/ && make install clean
To add the package: pkg install riscv-fesvr

PKGNAME: riscv-fesvr

ONLY_FOR_ARCHS: amd64

distinfo:

TIMESTAMP = 1502218901
SHA256 (freebsd-riscv-riscv-fesvr-git-5813492_GH0.tar.gz) = ba79b72678de9e473904e23fb0dd494f35b116afe3683e5acd00e2fd0600e4d6
SIZE (freebsd-riscv-riscv-fesvr-git-5813492_GH0.tar.gz) = 118436


NOTE: FreshPorts displays only information on required and default dependencies. Optional dependencies are not covered.

Build dependencies:
  1. gmake : devel/gmake

This port is required by:

for Libraries * - deleted ports are only shown under the This port is required by section. It was harder to do for the Required section. Perhaps later...
Configuration Options
     No options to configure

USES:
gmake

Master Sites:
  1. https://codeload.github.com/freebsd-riscv/riscv-fesvr/tar.gz/5813492?dummy=/

Number of commits found: 3

Commit History - (may be incomplete: see SVNWeb link above for full details)
DateByDescription
11 Aug 2017 17:47:52
Original commit files touched by this commit  g_20170711
Revision:447781
lwhsu search for other commits by this committer
- Update to 20170711 snapshot
08 Feb 2017 07:08:25
Original commit files touched by this commit  g_20170206
Revision:433634
lwhsu search for other commits by this committer
- Makr only for amd64
07 Feb 2017 15:33:04
Original commit files touched by this commit  g_20170206
Revision:433560
lwhsu search for other commits by this committer
Add RISC-V ISA Simulator:

- emulators/riscv-fesvr, RISC-V Frontend Server
- emulators/riscv-isa-sim, Spike, a RISC-V ISA Simulator

Original work is done by sbruno

Reviewed by:	br (earlier version)
Differential Revision:	https://reviews.freebsd.org/D7527

Number of commits found: 3

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