22:34 Eugene Grosbein (eugen) 

sysutils/cciss_vol_status: update to 1.12a

Changes since 1.12

       * Correct some logic, use bitwise instead of logical ands

While here, fix port Makefile bug checking for SRC_BASE
without including bsd.port.pre.mk, so SRC_BASE was always empty
and the check works due to /sys symlink pointing to real source tree;
the check failed without such /sys symlink.

Also, remove the patch upstreamed.

PR:		259462
Approved by:	Frank Wall (maintainer, initial patch)

    bcc1dd2

11:26 robak 

cciss_vol_status: update 1.11 -> 1.12

PR:		223078
Submitted by:	Maciej Suszko <maciej@suszko.eu>
Approved by:	Frank Wall <fw@moov.de> (maintainer timeout, 2 weeks)

 

11:20 madpilot 

- Update to 1.11
- Stagify
- While here, fix patch filename

PR:		190876
Submitted by:	Frank Wall <fw@moov.de> (maintainer)

 

08:16 mm 

Update to 1.10
Give up maintainership

14:20 mm 

- Update to 1.09

07:04 mm 

- Add missing distinfo update

Reported by:    pav

13:32 mm 

New port: sysutils/cciss_vol_status

        Very lightweight program to report the status of logical drives
        on Smart Array controllers ciss(4).

        WWW: http://cciss.sourceforge.net