Number of commits found: 11
Commit History - (may be incomplete: for full details, see links to repositories near top of page) |
Commit | Credits | Log message |
0.2.9_3 08 Sep 2023 09:06:24
    |
Mikael Urankar (mikael)  |
lang/rust: Bump revisions after 1.72.0
PR: 273331 |
0.2.9_2 17 Jul 2023 15:58:38
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Mikael Urankar (mikael)  |
lang/rust: Bump revisions after 1.71.0
PR: 272449 |
0.2.9_1 09 Jun 2023 11:38:16
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Mikael Urankar (mikael)  |
lang/rust: Bump revisions after 1.70.0
PR: 271797 |
0.2.9 09 May 2023 22:55:26
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Yuri Victorovich (yuri)  |
cad/svls: Update 0.2.8 → 0.2.9
Reported by: portscout |
0.2.8_1 23 Apr 2023 13:14:05
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Mikael Urankar (mikael)  |
lang/rust: Bump revisions after 1.69.0
PR: 270953 |
0.2.8 24 Mar 2023 06:06:08
    |
Yuri Victorovich (yuri)  |
cad/svls: Update 0.2.7 → 0.2.8
Reported by: portscout |
0.2.7_1 16 Mar 2023 11:11:52
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Mikael Urankar (mikael)  |
lang/rust: Bump revisions after 1.68.0
PR: 270080 |
0.2.7 06 Mar 2023 18:59:17
    |
Yuri Victorovich (yuri)  |
cad/svls: Update 0.2.6 → 0.2.7
Reported by: portscout |
0.2.6_2 13 Feb 2023 14:52:59
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Mikael Urankar (mikael)  |
lang/rust: Bump revisions after 1.67.1
PR: 269336 |
0.2.6_1 07 Jan 2023 19:24:18
    |
Daniel Engberg (diizzy)  |
*/*: Bump rust (cargo) ports to reflect on WITH_LTO
Bump ports in tree so they get rebuilt with new default settings
for cargo ports |
0.2.6 06 Jan 2023 07:17:53
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Yuri Victorovich (yuri)  |
cad/svls: New port: SystemVerilog language server |
Number of commits found: 11
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