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Port details
riscv-isa-sim Spike, a RISC-V ISA Simulator
g_20170810 emulators on this many watch lists=0 search for ports that depend on this port Find issues related to this port Report an issue related to this port
Maintainer: lwhsu@FreeBSD.org search for ports maintained by this maintainer
Port Added: 07 Feb 2017 15:33:13
License: BSD3CLAUSE
Spike, a RISC-V ISA Simulator

The RISC-V ISA Simulator implements a functional model of one or more RISC-V
processors.

WWW: https://github.com/freebsd-riscv/riscv-isa-sim
SVNWeb : Homepage : PortsMon
    Pseudo-pkg-plist information, but much better, from make generate-plist
    Expand this list (45 items)
  1. /usr/local/share/licenses/riscv-isa-sim-g_20170810/catalog.mk
  2. /usr/local/share/licenses/riscv-isa-sim-g_20170810/LICENSE
  3. /usr/local/share/licenses/riscv-isa-sim-g_20170810/BSD3CLAUSE
  4. bin/spike
  5. bin/spike-dasm
  6. bin/termios-xspike
  7. bin/xspike
  8. include/spike/cachesim.h
  9. include/spike/common.h
  10. include/spike/config.h
  11. include/spike/debug_module.h
  12. include/spike/decode.h
  13. include/spike/devices.h
  14. include/spike/disasm.h
  15. include/spike/encoding.h
  16. include/spike/extension.h
  17. include/spike/icache.h
  18. include/spike/insn_list.h
  19. include/spike/insn_template.hpp
  20. include/spike/internals.h
  21. include/spike/jtag_dtm.h
  22. include/spike/memtracer.h
  23. include/spike/mmu.h
  24. include/spike/mulhi.h
  25. include/spike/primitiveTypes.h
  26. include/spike/primitives.h
  27. include/spike/processor.h
  28. include/spike/remote_bitbang.h
  29. include/spike/rocc.h
  30. include/spike/sim.h
  31. include/spike/softfloat.h
  32. include/spike/softfloat_types.h
  33. include/spike/specialize.h
  34. include/spike/tracer.h
  35. include/spike/trap.h
  36. lib/libdummy_rocc.so
  37. lib/libriscv.so
  38. lib/libsoftfloat.so
  39. lib/libspike_main.so
  40. libdata/pkgconfig/riscv-dummy_rocc.pc
  41. libdata/pkgconfig/riscv-riscv.pc
  42. libdata/pkgconfig/riscv-softfloat.pc
  43. libdata/pkgconfig/riscv-spike_main.pc
  44. @postexec /sbin/ldconfig -m /usr/local/lib
  45. @postunexec /sbin/ldconfig -R
  46. Collapse this list.

To install the port: cd /usr/ports/emulators/riscv-isa-sim/ && make install clean
To add the package: pkg install riscv-isa-sim

PKGNAME: riscv-isa-sim

ONLY_FOR_ARCHS: amd64

distinfo:

TIMESTAMP = 1502283838
SHA256 (freebsd-riscv-riscv-isa-sim-git-54ae820_GH0.tar.gz) = 0e201f99f1a808e09f52859374198cdcf050c52f1e7900ca4f9c5a7ef9eb0ac6
SIZE (freebsd-riscv-riscv-isa-sim-git-54ae820_GH0.tar.gz) = 199179


NOTE: FreshPorts displays only information on required and default dependencies. Optional dependencies are not covered.

Build dependencies:
  1. gmake : devel/gmake
Library dependencies:
  1. libfesvr.so : emulators/riscv-fesvr
There are no ports dependent upon this port

Configuration Options
     No options to configure

USES:
compiler:c++11-lang gmake shebangfix

Master Sites:
  1. https://codeload.github.com/freebsd-riscv/riscv-isa-sim/tar.gz/54ae820?dummy=/

Number of commits found: 5

Commit History - (may be incomplete: see SVNWeb link above for full details)
DateByDescription
10 Sep 2017 20:55:39
Original commit files touched by this commit  g_20170810
Revision:449591
gerald search for other commits by this committer
Bump PORTREVISION for ports depending on the canonical version of GCC
(via Mk/bsd.default-versions.mk and lang/gcc) which has moved from
GCC 5.4 to GCC 6.4 under most circumstances.

This includes ports
 - with USE_GCC=yes or USE_GCC=any,
 - with USES=fortran,
 - using Mk/bsd.octave.mk which in turn features USES=fortran, and
 - with USES=compiler specifying openmp, nestedfct, c++11-lib, c++11-lang,
   c++14-lang, c++0x, c11, or gcc-c++11-lib.

PR:		219275
11 Aug 2017 17:50:49
Original commit files touched by this commit  g_20170809
Revision:447782
lwhsu search for other commits by this committer
- Update to 20170809 snapshot
01 Apr 2017 15:23:32
Original commit files touched by this commit  g_20170207
Revision:437439
gerald search for other commits by this committer
Bump PORTREVISIONs for ports depending on the canonical version of GCC and
lang/gcc which have moved from GCC 4.9.4 to GCC 5.4 (at least under some
circumstances such as versions of FreeBSD or platforms).

This includes ports
 - with USE_GCC=yes or USE_GCC=any,
 - with USES=fortran,
 - using using Mk/bsd.octave.mk which in turn has USES=fortran, and
 - with USES=compiler specifying openmp, nestedfct, c++11-lib, c++14-lang,
   c++11-lang, c++0x, c11, or gcc-c++11-lib.

PR:		216707
08 Feb 2017 07:08:25
Original commit files touched by this commit  g_20170206
Revision:433634
lwhsu search for other commits by this committer
- Makr only for amd64
07 Feb 2017 15:33:04
Original commit files touched by this commit  g_20170206
Revision:433560
lwhsu search for other commits by this committer
Add RISC-V ISA Simulator:

- emulators/riscv-fesvr, RISC-V Frontend Server
- emulators/riscv-isa-sim, Spike, a RISC-V ISA Simulator

Original work is done by sbruno

Reviewed by:	br (earlier version)
Differential Revision:	https://reviews.freebsd.org/D7527

Number of commits found: 5

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