| Port details on branch 2026Q3 |
- verilator Synthesizable Verilog to C++ compiler
- 5.050_2 cad
 =0      5.050_2Version of this port present on the latest quarterly branch. - Maintainer: yuri@FreeBSD.org
- Port Added: 2026-07-14 01:09:06
- Last Update: 2026-07-21 17:05:42
- Commit Hash: f39a1ce
- License: ART20 LGPL3+
- WWW:
- https://www.veripool.org/verilator/
- https://github.com/verilator/verilator
- Description:
- Verilator is the fastest free Verilog HDL simulator, and beats most commercial
simulators. It compiles synthesizable Verilog (not test-bench code!), plus some
PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code. It is
designed for large projects where fast simulation performance is of primary
concern, and is especially well suited to generate executable models of CPUs
for embedded software design teams.
  ¦  ¦  ¦  ¦ 
- Manual pages:
-
- pkg-plist: as obtained via:
make generate-plist - USE_RC_SUBR (Service Scripts)
- no SUBR information found for this port
- Dependency lines:
-
- verilator>0:cad/verilator
- To install the port:
- cd /usr/ports/cad/verilator/ && make install clean
- To add the package, run one of these commands:
- pkg install cad/verilator
- pkg install verilator
NOTE: If this package has multiple flavors (see below), then use one of them instead of the name specified above.- PKGNAME: verilator
- Flavors: there is no flavor information for this port.
- distinfo:
- TIMESTAMP = 1782969485
SHA256 (verilator-verilator-v5.050_GH0.tar.gz) = ec6723f30c1798b1fbbbed97364f09c431fb4875577c314f37240e99b60a4a04
SIZE (verilator-verilator-v5.050_GH0.tar.gz) = 6339575
No package information for this port in our database- Sometimes this happens. Not all ports have packages. Perhaps there is a build error. Check the fallout link:
- Dependencies
- NOTE: FreshPorts displays only information on required and default dependencies. Optional dependencies are not covered.
- Build dependencies:
-
- ar : devel/binutils
- autoconf>0 : devel/autoconf
- bash : shells/bash
- help2man : misc/help2man
- bison : devel/bison
- gmake>=4.4.1 : devel/gmake
- python3.12 : lang/python312
- perl5>=5.42.r<5.43 : lang/perl5.42
- Test dependencies:
-
- python3.12 : lang/python312
- Runtime dependencies:
-
- ar : devel/binutils
- liblz4>0 : archivers/liblz4
- python3.12 : lang/python312
- perl5>=5.42.r<5.43 : lang/perl5.42
- Library dependencies:
-
- libsystemc.so : devel/systemc
- This port is required by:
- for Run
-
- cad/py-cocotb
Configuration Options:- ===> The following configuration options are available for verilator-5.050_2:
INSTALL_DBG_EXECUTABLES=off: Install *_dbg executables
LEAK_CHECKS=off: Disable intentional memory leaks
===> Use 'make config' to modify these settings
- Options name:
- cad_verilator
- USES:
- bison compiler:c++17-lang gmake localbase:ldflags perl5 python:build,run,test shebangfix tar:tgz
- FreshPorts was unable to extract/find any pkg message
- Master Sites:
|
Number of commits found: 3
| Commit History - (may be incomplete: for full details, see links to repositories near top of page) |
| Commit | Credits | Log message |
|---|
5.050_2
21 Jul 2026 17:05:42
 |
Yuri Victorovich (yuri) |
cad/verilator: Fix run-time error when verilated program couldn't find lz4
/usr/local/share/verilator/include/verilated.mk is patched with relevant
values.
PR: 296673
Reported by: Joel Bodenmann <jbo@FreeBSD.org>
(cherry picked from commit d9a357804e97a3ab009c2f865530226c44eb5ea7) |
5.050_1
14 Jul 2026 21:17:33
|
Joel Bodenmann (jbo) |
cad/verilator: Bump after adding dependency
PR: 296673
Approved by: portmgr (blanket)
Fixes: 40e5f725452b ("cad/verilator: Add missing lz4 run-time dependency")
(cherry picked from commit bb7e2e391c85eed8375739c4b7341de80b5c3598) |
5.050
14 Jul 2026 01:06:26
|
Yuri Victorovich (yuri) |
cad/verilator: Add missing lz4 run-time dependency
PR: 296673
Reported by: Joel Bodenmann <jbo@FreeBSD.org>
(cherry picked from commit 40e5f725452bf9fbcf763c020038f075bf47a99a) |
Number of commits found: 3
|
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