| Commit History - (may be incomplete: for full details, see links to repositories near top of page) |
| Commit | Credits | Log message |
|---|
g20181021_1
23 Apr 2023 09:09:58
     |
Gerald Pfeifer (gerald)  |
*: Bump PORTREVISIONs for math/mpc update to 1.3.1 |
07 Sep 2022 21:58:51
|
Stefan Eßer (se) |
Remove WWW entries moved into port Makefiles
Commit b7f05445c00f has added WWW entries to port Makefiles based on
WWW: lines in pkg-descr files.
This commit removes the WWW: lines of moved-over URLs from these
pkg-descr files.
Approved by: portmgr (tcberner) |
g20181021
07 Sep 2022 21:10:59
|
Stefan Eßer (se) |
Add WWW entries to port Makefiles
It has been common practice to have one or more URLs at the end of the
ports' pkg-descr files, one per line and prefixed with "WWW:". These
URLs should point at a project website or other relevant resources.
Access to these URLs required processing of the pkg-descr files, and
they have often become stale over time. If more than one such URL was
present in a pkg-descr file, only the first one was tarnsfered into
the port INDEX, but for many ports only the last line did contain the
port specific URL to further information.
There have been several proposals to make a project URL available as
a macro in the ports' Makefiles, over time.
(Only the first 15 lines of the commit message are shown above  ) |
g20181021
20 Jul 2022 14:21:35
|
Tobias C. Berner (tcberner) |
devel: remove 'Created by' lines
A big Thank You to the original contributors of these ports:
* "Waitman Gobble" <uzimac@da3m0n8t3r.com>
* <jkoshy@FreeBSD.org>
* Aaron Dalton <aaron@FreeBSD.org>
* Aaron Dalton <aaron@daltons.ca>
* Aaron H. K. Diep <ahkdiep@gmail.com>
* Aaron Hurt <ahurt@anbcs.com>
* Abel Chow <abel_chow@yahoo.com>
* Adam McLaurin
* Adam Saponara <as@php.net>
* Adam Weinberger <adamw@FreeBSD.org>
* Ade Lovett <ade@FreeBSD.org> (Only the first 15 lines of the commit message are shown above ) |
g20181021
06 Apr 2021 14:31:07
|
Mathieu Arnold (mat) |
Remove # $FreeBSD$ from Makefiles. |
g20181021
04 Jan 2020 18:47:27
  |
yuri |
Move the port devel/yosys -> cad/yosys, to the proper category |
g20181021
04 Jan 2020 09:53:36
|
yuri |
devel/{arachne-pnr,icestorm,lattice-ice40-examples-hx1k,lattice-ice40-examples-hx8k,lattice-ice40-tools}:
Maintainer reset
Based on consecutive timeouts on PRs no 238483, 238484, 240256, 241387 as per
policy. |
g20181021
14 Nov 2018 16:03:21
|
tobik |
devel/lattice-ice40-tools: Bump version to match the rest of the iCE40 FPGA
toolchain
PR: 233077
Submitted by: Johnny Sorocil <jsorocil@gmail.com> (maintainer)
Differential Revision: https://reviews.freebsd.org/D17642 |
g20180310
06 Jun 2018 14:52:58
|
tobik |
New port: devel/lattice-ice40-tools
Metaport which enables a fully open source Verilog-to-Bitstream
flow for iCE40 FPGAs.
WWW: http://www.clifford.at/icestorm
PR: 227592
Submitted by: Johnny Sorocil <jsorocil@gmail.com>
Differential Revision: https://reviews.freebsd.org/D15632 |
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