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Port details
lattice-ice40-tools Open source tools for Lattice iCE40 FPGAs
g20181021 devel on this many watch lists=0 search for ports that depend on this port Find issues related to this port Report an issue related to this port
Maintainer: jsorocil@gmail.com search for ports maintained by this maintainer
Port Added: 2018-06-06 14:53:12
Last Update: 2018-11-14 16:03:21
SVN Revision: 484933
License: not specified in port
Metaport which enables a fully open source Verilog-to-Bitstream
flow for iCE40 FPGAs.

WWW: http://www.clifford.at/icestorm
SVNWeb : Homepage

There is no configure plist information for this port.

Dependency lines:
  • lattice-ice40-tools>0:devel/lattice-ice40-tools

To install the port: cd /usr/ports/devel/lattice-ice40-tools/ && make install clean
To add the package: pkg install lattice-ice40-tools

PKGNAME: lattice-ice40-tools

There is no flavor information for this port.

distinfo:

TIMESTAMP = 1528041379
SHA256 (OLIMEX-iCE40HX1K-EVB-69df5a7fc2daa8f00a984426b721499f6df22492_GH0.tar.gz) = 99a6328ccfcd7a6a8a25d1521c028d1a1b5418b7de1dcc3b2db40e7d1bed9034
SIZE (OLIMEX-iCE40HX1K-EVB-69df5a7fc2daa8f00a984426b721499f6df22492_GH0.tar.gz) = 2181827
SHA256 (OLIMEX-iCE40HX8K-EVB-ae283711fc6c18f1905d0abf78195aed191ce612_GH0.tar.gz) = 1f6d29d1420f608fda49f1b50085453bd4c6d32067773d210af386f95b24bd3a
SIZE (OLIMEX-iCE40HX8K-EVB-ae283711fc6c18f1905d0abf78195aed191ce612_GH0.tar.gz) = 1370726


NOTE: FreshPorts displays only information on required and default dependencies. Optional dependencies are not covered.

Runtime dependencies:
  1. abc : cad/abc
  2. arachne-pnr : devel/arachne-pnr
  3. icepack : devel/icestorm
  4. yosys : devel/yosys
  5. lattice-ice40-examples-hx1k>=g0 : devel/lattice-ice40-examples-hx1k
  6. lattice-ice40-examples-hx8k>=g0 : devel/lattice-ice40-examples-hx8k
There are no ports dependent upon this port

Configuration Options
===> The following configuration options are available for lattice-ice40-tools-g20181021:
     EXAMPLES=on: Build examples for Olimex iCE40 FPGA boards
===> Use 'make config' to modify these settings

USES:
metaport

Master Sites:
    There is no master site for this port.

Number of commits found: 2

Commit History - (may be incomplete: see SVNWeb link above for full details)
DateByDescription
14 Nov 2018 16:03:21
Original commit files touched by this commit  g20181021
Revision:484933
tobik search for other commits by this committer
devel/lattice-ice40-tools: Bump version to match the rest of the iCE40 FPGA
toolchain

PR:		233077
Submitted by:	Johnny Sorocil <jsorocil@gmail.com> (maintainer)
Differential Revision:	https://reviews.freebsd.org/D17642
06 Jun 2018 14:52:58
Original commit files touched by this commit  g20180310
Revision:471848
tobik search for other commits by this committer
New port: devel/lattice-ice40-tools

Metaport which enables a fully open source Verilog-to-Bitstream
flow for iCE40 FPGAs.

WWW: http://www.clifford.at/icestorm

PR:		227592
Submitted by:	Johnny Sorocil <jsorocil@gmail.com>
Differential Revision:	https://reviews.freebsd.org/D15632

Number of commits found: 2

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